Inverter short circuit control producing constant short circuit current



July 9, 1968 R. G|ANNAMORE r-:TAL 3,392,321

INVERTER SHORT CIRCUIT CONTROL PRODUCING CONSTANT SHORT CIRCUIT CURRENT5 Sheets-Sheet 1 Filed Jan. 24, 1966 INVENTORS RONALD GIANNAMORE ERNESTLEVY AUSTEN V WELL @@gg ATT N Y %N\ anw o@ 10.1

mme Q2 @@wa mum mo@ ZEE wnoov mwa 2 July 9, 1968 R. GIANNAMORE r-:TAL3,392,321

INVERTER SHORT CIRCUIT CONTROL PRODUCING CONSTANT SHORT CIRCUIT CURRENT5 Sheets-Sheet 2 Filed Jan. 24, 1966 150:30 oh IO July 9, 1968 FiledJan. 24,

R. GIANNAMQRE ETAL 3,392,321 INVERTER SHORT CIRCUlT CONTROL PRODUCINGCONSTANT SHORT CIRCUIT CURRENT 5 Sheets-Sheet 5 scRa P545 l HG 5 scR2502 B+ To INVERTER L To OUTPUT July 9, 1968 R. GlANNAMORE ETAL 3,392,321

INVERTER SHORT CIRCUIT CONTROL PRODUCING CONSTANT SHORT CIRCUIT CURRENT844 GATE AMPUFIER July 9, 1968 R. GIANNAMORE ETAL 3,392,321

INVERTER SHORT CIRCUIT CONTROL PRODUCNG CONSTANT SHORT CIRCUIT CURRENT 5Sheets-Sheet 5 Filed Jan. 24, 1966 Ln/N AAM

UO Omm +m All..

Q ...QM

United States Patent O 3,392,321 INVERTER SHORT CIRCUIT CONTROLPRODUCING CONSTANT SHORT CIR- CUIT CURRENT Ronald Giannamore, Wapping,Conn., Ernest Levy, Woodland Hills, Calif., and Austen V. Powell,Cambridge, Mass., assgnors to United Aircraft Corporation, EastHartford, Conn., a corporation of Delaware Filed Jan. 24, 1966, Ser. No.522,522 5 Claims. (Cl. 321-11) ABSTRACT 0F THE DISCLOSURE Ashort-circuit control producing a constant short-circuit current inresponse to abrupt or gradual short circuits in the output of aninverter that uses pulse width modulated power controlled rectifiers totransform the input D.C. power to A.C. output power. The conductiontimes of the rectifiers are cut back to predetermined-minimum durationsin response to malfunctions in the output of the inverter.

This invention relates to `a novel controlled rectifier circuit for the.inversion of D C. power to A C. power.

Inverter circuits for the transformation of D.C. power to A C. powerhave been available for some time in various combinations. Of specificinterest is the circuit d escribed in the patent to Francis Lawn, No.2,872,635. The circuit in this patent comprises a third controlledrectifier to extinguish one or two parallel power rectifiers by use of acommutating capacitor. In high power inverters two parallel powerrectifiers are operated alternately to discharge high currents into acommon impedance such as the primary of a transformer.

In recent times the development of the silicon controlled rectifier(SCR) has greatly contributed to the inverter art by providing a simpleand efiicient ele-ment to replace the gas-type thyratrons described inthe earlier Lawn patent. The SCR, however, exhibits operatingcharacteristics which may render high power inverters unstable,complicated to control and diflicult to activate u-nless specialprecautions are taken. For instance, when the voltage applied to thegate of an SCR drops to a range below the required minimum the firing ofthe device becomes erratic. With such low gating voltage some SCRs willbe gated on (firing) where as others may not. Hence, with low gatingvoltages operation of the parallel power SCR circuit may becomeunsymmetrical'with time and low gate voltages may, for instance, beencountered during the initial turning on of an inverter or when theinput D.C. voltage drops ybelow a safe value.

The parallel 3 SCR circuit as described in the Lawn patent utilizes twopower rectifiers, SCR-1 and SCR2 which are fired alternately 180 apartin phase. A third control SCR is then used to control the firing time ofthe power SCRs. By controlling the firing time of the third SCR, powerand voltage regulation of the output of the inverter is obtained. Thetwo power rectifiers are fired symmetrically in time to avoid outputtransformer saturation that causes excessive currents through the powerSCRs with subsequent failures. n

It is essential that these undesirable operati-ng conditions be detectedand corrected in an efficient and quick manner. Such speedy correctionis provided in this invention by a circuit incorporating a fourth SCRwhich eX- tinguishes the power SCRs by removal of their D.C. power ashort instance after a malfunction is detected. In addition, theinstability problem that may occur at turn on with low anode-to-cathodevoltage across the power SCRs is avoided in a similar manner bytemporarily removing the D.C. power from the power SCRs 3,392,321Patented July 9, 1968 ICC until the D.C. input power has reached asufficiently high value. Further precautions are made in response tothese malfunctions by cutting back on the conduction angles, alsovcalled conduction times, of the power controlled rectifiers topredetermined minimum angles or durations.

A typical situation where at turn on the D C. power is low occurs whenthe inverter is used in combination with a power supply to provide acombined conversion of A.C. power at one frequency to A.C. power at asecond frequency. Thus, where 60 c.p.s. power is available but 400c.p.s. power output is needed, a conversion may be conventionallyaccomplished by first rectifying and filtering the input A.C. power toproduce D.C. power and then inverting the D.C. power to the desired A C.output power frequency. Since the D.C. power is derived through a filterto remove most of the input ripple, it will rise relatively slowly tothe design level and during this rise unstable firing of the power SCRsmay be avoided by the activation of the fourth SCR.

A short-circuit sensing device to protect the inverter circuitry isspecially needed with regulated inverter outputs. The response of theshort-circuit sensor must be fast to provide the desired protection.Hence, immediate rem-oval of the D.C, power from the power rectifiersupon the occurrence ofa short circuit is provided by this invention.

Since a short circuit often occurs in an equipment that itself isprotected with fuses or circuit breakers and other equipments powered bythe inverter should not be disabled by the short circuit occurring inthe one equipment, the latter may be removed from the inverter outputcircuit by forcing a high constant short-circuit output current toeffectively blow its fuse or trip its circuit breaker. Special circuitryto quickly produce this effect and prevent instability in the responseof the inverter system is provided for by this invention.

In multiphase inverters, shorts may occur in one particular phase andnot in others causing unsymmetric loading, misfiring of the power SCRs,and damage to circuitry. In this invention the phase having a short isidentified and appropriate action is taken to protect the circuitry.

Other features and advantages will be apparent from the specificationand claims, and from the accompanying drawings which illustrate anembodiment of the invention.

It is therefore an object of this invention to provide a novelshort-circuit control for an inverter.

It is a further object of this invention to provide a novel controlsystem for producing a constant short circuit current from an inverterusing a controlled rectifier to transform the input D.C. power to A.C.output power.

1t is still another object of this invention to provide a novel controlsystem for an inverter in response to abrupt or gradual short circuitsoccurring in its output.

It s a further object of this invention to provide a novel controlprotection system for an inverter using pulse width modulated controlledrectifiers for the generation of the A C; output power wherein theconduction times of the rectifiers are cut back to predetermined minimumdurations in response to malfunctions in the inverter or its outputs.

FIGURE 1 shows a system block diagram of a threephase inverter of thisinvention in combination with a power supply.

FIGURE 2 Shows a partial schematic representation of the logic andcontrol circuitry for the inverter.

FIGURE 3 shows the two-phase to three-phase transformation.

FIGURE 4 shows the inverter output voltage response as a function ofcurrent under various conditions.

FIGURE 5 shows the firing time relationship of a three SCR circuit.

FIGURE 6 shows an undervoltage protection circuit.

FIGURE 7 shows a shutoff circuit for a silicon controlled rectifier.

FIGURE 8 shows a circuit to identify the shorted phase in a polyphasecircuit and the main gate inhibit circuit.

FIGURE 9 shows a short circuit sensor.

FIGURE 10 shows an overvoltage protection circuit.

FIGURE 11 shows a constant current control circuit.

In FIGURE 1 a block diagram of a complete system comprising a powersupply and an inverter combination is shown. The input power is 440volts three-phase 60 c.p.s. which is fed into a three-phase circuitbreaker arrangement 100. The three-phase output from the circuitbreakers is fed to a three-phase rectifier and filter arrangement 102 toproduce high D.C. power at 250 volts. The high D.C. supply is then usedto power the inverter for the production of the 400 c.p.s. output power.In addition, the three-phase input power is used to provide a low D.C.supply Voltage 104 which has an unregulated and a regulated portion. Theregulated portion produces -a D.C. supply for the activation of thecontrol circuitry. The unregulated portion of the low D.C. supplyprovides immediate activation when input A.C. power is applied to permitcertain circuits to respond rapidly. An overvoltage sensor circuit 106senses the high D C. supply voltage and trips the circuit breakers 100when the high D C. supply exceeds a predetermined value.

The inverter comprises a two-phase system which then is transformed by astandard two-phase to three-phase transformation to produce thethree-phase 400 cycle output power. The two-phase system includes a maininverter 108, a teaser inverter 110 which drives a two-phase tothree-phase transformer combination 112. The main inverter is controlledby a main conduction angle control 114 together with a main power gatecontrol and drive 115 Similarly, the teaser inverter 110 is controlledby a teaser conduction angle control 116 and a teaser power gate controldrive 117.

The control of the main and teaser phases relative to one another isIprovided by the phase control circuitry comprising an 800 c.p.s.oscillator 122 driving a main multivibrator 124 which in turn suppliesthe main power gate control and drive circuitry 115 with the basic 400c.p.s. volts signal. The other side of the 800 c.p.s. oscillator 122 isfed to a phase control 126, the output of which triggers the teaserpower multivibrator 128 and this in turn supplies the teaser gatecontrol and drive circuitry 117 with the basic 400 c.p.s. triggeringsignal. Phase control 126 receives an input from comparator circuitry130 which has its inputs connected to two of the output three phases sothat a comparison can be made between the magnitude of the main andteaser phases for relative phase control.

The main voltage regulation is accomplished by sensing the main phaseoutput voltage with a sensor 132 and deriving therefrom an equivalentD.C. voltage which is used to control the angle of conduction of themain inverter via the main conduction angle control 114. Similarly, theteaser voltage is regulated by sensing the teaser output voltage with asensor 134 and an equivalent D.C. voltage which is applied to the teaserconduction angle control 116.

An undervoltage sensor 136 senses the fact that the D.C. supply has avoltage below a permissible value and produces an output signal upon thedetection thereof to inhibit the pulses to the main power gates and theteaser power gates. In addition, an undervoltage signal is applied via adelay network 138 to the main conduction angle control 114 and theteaser conduction angle control 116 to cut back on both the main andteaser inverters conduce tion angles. This controls the overshoot duringstart up when the input D.C. voltage rises to its design value.

A special starter circuit is provided by sensing the rise of the highD.C. supply through a capacitor network 140 which activates a startcircuit 142. The output of the start 4 circuit is applied to both themain and teaser fourth SCR protect circuits 118 and 120, respectively,as well as the delay network 138 after the fourth SCRs have been red tocut back initially on the conduction angles of the main and teaserinverters. In this manner, the startup conditions of the main and teaserinverters are preset so that the output power is built up gradually fromzero to regulated levels with a controlled overshoot, if any, response.

Upon the sensing of a short circuit in any of the three output phases, asignal is produced from -a short circuit sensor 144 which initiates asimilar response in the main inverter and teaser inverter as well astheir control circuitry as that produced by the startup circuitry.Hence, the short circuit sensor output is connected to the input ofstart circuit 142.

Under certain conditions the main or teaser inverter may ybe firingunsymmetrically and unreliably. On each of these main and teaserinverters a misre detection circuit is connected to produce an outputsignal 101 and 103, respectively, indicative of such a malfunction, andeach of these is connected to the start circuit 142 to again initiateboth a disconnection of the high D.C. supply from main and teaserinverters as well as a outback in the main and teaser conduction angles.

As soon as an abrupt short circuit has been sensed by the sensor 144, aconstant current signal sensor 146 takes over control to establish aconstant current output from the main and teaser inverters to assure thetripping of the circuit breaker or the blowing of the fuse 0f theequipment responsible for the short circuit. The outputs of the constantcurrent control sensor 146 is applied to the main conduction anglecontrol 114 and a teaser conduction control 116. Constant currentcontrol signal sensor 146 senses each of the currents in the three-phaseoutput windings and its output is proportional to the current in theloads. Under certain circumstances, however, it is essential that thetype of short be identified in order to completely prevent the maininverter from firing. Such identification is provided by short-typeidentified circuit 148 which, when activated, produces an output signalfor the inhibition for the main power gates at the main power gatecontrol and drive circuitry 115.

3 SCR operation The main and teaser inverters herein described eachoperate on the 3 SCR inverter principle wherein two power SCRs are firedin parallel and sequentially and a third SCR is used to extinguish theON power SCR. FIGURE 2 shows SCRl and SCRZ having their anodes connectedto the primary of a transformer 200 and a capacitor 202 connected acrossthe primary of the transformer and coupling the two anodes 204 and 206.

The cathodes 208 and210 are connected together and to ground via a smallresistor 212. A third SCR has its anode connected to the anodes 204 and206 via capacitors 214 and 216, respectively. The cathode of SCR3 isconnected to ground. Also connected to the anode of SCR3 is a choke 218in series with a diode 220 with the anode of the diode connected to thecathodes 208 and 210 of SCRs 1 and 2. The power SCRs 1 and 2 have theirgates 222 and 224 connected to a gating signal which is supplied from acommon 400 c.p.s. gating signal source and driver, generally indicatedat 228. The primary of transformer 200 is supplied with high voltageD.C. power through an auto transformer 230. The gating signal for thethird SCR is obtained from a conduction angle control circuitrygenerally indicated at 232.

In operation, the three SCR power circuitry functions as follows.Assuming that SCRl is conducting and SCRZ is off. In that case the anodeat SCRl is essentially at ground potential except for the small voltageacross the resistor 212 as well as the potential across the SCRLConduction of SCRl would continue unless it is turned OFF which isaccomplished by tiring the third SCR at the appropriate and controlledtime. When SCR3 is turned ON, its anode voltage, which is at somepositive potential because of the voltage divider network formed by thecapacitors 214 and 216, will be discharged to ground and a negativepulse is applied to the anodes of SCRs 1 and 2. Hence, the anode of 204drops below ground thereby shutting OFF the conducting SCR1. Thenonconducting anode of SCR2 which was at some positive potential ofapproximately B-lwill drop close to ground potential for a short time.Hence, SCRS acts as a device to turn OFF either of the conducting powerSCRs. The time at which the third SCR is activated is controlled by theconduction angle control circuitry so that the power delivered to theload to the transformer 200 as well as the output voltage may becontrolled. The third SCR is again automatically extinguished by thecombined resonating action of the choke 218, `and the capacitors 214 or216. With reference to FIGURE 5, the waveforms 500 and 502 show therespective firing times of the power SCRs 1 and 2. The SCRS waveform 506shows that its conductioin will terminate the conduction of either oneof the conducting power rectifiers. Hence, for an output power frequencyof 400 cycles, each power SCR is fired once and the other is red 180out-of-phase.

This three SCR inverter scheme is applicable to both the main inverter108 and the teaser inverter 110. Each of these inverters is providedwith a power SCR gating control -and drive 228 and a third SCRconduction angle control 232. These controls correspond to the powergate control and drives 115 and 117 and the conduction angle controls114 and 116 in FIGURE 1. It is, of course, conceivable that for higherpower applications, that several power SCRs may be connected in seriesas well as parallel; for instance, where SCRl represents two siilconcontrol rectiers connected in series in conventional manner.

Cont/'0l circuitry With further reference to FIGURE 2, the schematicrepresentation of the control features provided with this inverter maybe observed. The control includes a fourth SCR power removal circuitgenerally indicated at 234. In addition, a gate inhibiting circuit and aconduction angle cutback circuit is generally indicated at 236.

The power removal circuit comprises a fourth SCR which has its anodeconnected to the center tap of the auto transformer 230. As previouslymentioned, this auto transformer is in series with the high D.C. powersource that provides the power for the main and teaser inverters. Thefourth SCR has its cathode connected to ground via capacitor 238 as wellas the series resistor voltage divider network consisting of resistors240 and 242. The gate of the fourth SCR is connected to a secondary of atransformer 244 which is further provided with another secondary winding246 for powering the fourth SCR in the other power inverter circuit. Theprimary of transformer 244 is connected to the low voltage power supplyand to the collector of a transistor 248. Transistor 248 is activatedupon the occurrence of a signal at the base of transistor 250 fromeither of the four inputs through diodes 252, 254, 256 and 258.Transistor 250 together with transistor 260 form a Schmidt trigger. Thefunctional inputs in the diodes are respectively the startup circuitthrough diode 252, the main misre detection signal through diode 254,the teaser misre detection signal through diode 256 and the short sensordetection signal through diode 258. Upon the occurrence of either ofthese signals, the SCR4 will be triggered ON. Prior to the triggering ofSCR4 the capacitor 238 will be discharged through the series resistorcombination 240 and 242. When the SCR4 is triggered it effectivelyshorts the center tap of the auto transformer 230 to ground. Bytransformer action the voltage applied to the inverter at transformer200 goes negative and forces the power SCRs 1 and 2 as well as the SCRSto be shut off. In addition, after a small delay determined by thecombination of the capaci- 6 tor 238 and the resistors 240 and 242, thegate signals to the power SCRs of both the main and teaser inverterswill be removed by the gate removal circuit 236. The turning OFF of thefourth SCR is provided by the resonant circuit combination of the choke230 and the capacitor 238 so that approximately a half cycle later atthe resonant frequency the SCR4 will be shut off. This frequency must beselected sufficiently long so that the power SCRs in the main and teaserinverters may be shut off The misre signals applied through diodes 254and 256 are derived from a network placed in series with the power SCRsof the main and teaser inverters. As shown in FIGURE 2, the cathode ofSCRl and SCR2 are returned to ground through a small resistor 212. Thisresistance of 212 must carry very large currents so its value is of therange of 1/10 of one ohm. This value is selected in order to provide asuitable level when a misring of the power SCRs 1 and 2 occurs. Suchmisring may be observed when both conduct at the same time in which caseunsymmetrical operation of the inverter will cause destruction. Withboth of the SCRs 1 and 2 conducting, the voltage across the resistor 212will rise to a suiciently high level to force a triggering of theSchmidt trigger formed by transistors 250 and 260 and activate thefourth SCR circuit. The detection of the startup signal through diode252 is obtained by observing the rise in potential of the high voltageD.C. power supply through the capacitor 262 and resistor 264combination. When the voltage at the input to capacitor 262 rises inresponse to the application of input power, the rise is passed onthrough the capacitor and a sufficient high voltage across the resistor264 is developed to trigger the SCR4. The short-circuit detection signalwill be described in more detail hereinafter.

The gate inhibit or removal circuit 236 is activated by the triggeringof one of the fourth SCRs and couples the signal detected across thevoltage divider network formed by resistors 240 and 242 to turn ontransistor 266 which is normally off. Turning transistor 266 ON causesthe transistor 268 which has its base connected to the collector oftransistor 266 to turn OFF since it is normally on.

The turning OFF of transistor 268 in turn causes its collector to riseto the B| potential since the collector of transistor 268 is connectedthrough resistor 270 to the low regulated B-| supply. The high rise inthe collector of transistor 268 turns ON transistor 272, the collectorof which rises sufficiently to turn ON transistor 274 which has its baseconnected to the collector of transistor 272. A capacitor 276 isconnected from the base to the collector of transistor 274 and thecommon junction of the capacitor and the collector of transistor 274 inturn is returned to ground through a resistor 278. The common point ofthe capacitor 276 and resistor 278 is then connected to the conductionangle control circuit for both the main and teaser inverters. Thepolarity of the signal across the resistor 278 is such as to cause asubstantial cutback in the conduction angle and it becomes effectiveafter some delay produced by the combination of the capacitor 276 andthe resistor 278. The base and the emitter of transistor 274 areconnected to the low regulated B+ supply via resistors 280 and 282,respectively.

Another input to the gate inhibit circuit 236 is provided by theundervoltage network to be described in more detail hereafter. Theoutput of the undervoltage circuit 284 is connected to the base oftransistor 268 and has such polarity to turn that transistor OFF when anundervoltage signal is detected. The collector of transistor 268therefore produces an output pulse relatively quickly after either anundervoltage signal has been detected or when one of the fourth SCRs hasbeen red. This signal is then applied to the gate inhibit circuit 228.As shown in FIGURE 2, the inhibit signal in the case of the gate drivenetwork for the main inverter is connected to main gate inhibit circuit286 as well as the center tap of the transformer 288 and in the case ofthe teaser inverter is connected only to the center tap of thetransformer 288 coupling the 400 cycle power gate pulses to the drivecircuitry. The main gate inhibit circuitry 286 will be described in moredetail hereafter.

The gate drive circuitry 228 has a transformer 288 which in turn hasboth ends of its secondary connected to a pair of back-toback diodecombinations. The secondary is connected to the cathode of diodes 290and 292 and the anode of each of these diodes is connected to the anodeof another pair of diodes 294 and 296, respectively. The common pointbetween the anodes is connected in both series diode combinations to thelow regulated B-lsupply through a resistor. Each of the cathodes of theseries diode combinations is then connected to the base of a transistor298 and 201, each of which together with transistors 203 and 205provides the amplification necessary to drive the SCRl and SCR2 gatesthrough transformer 207. In the teaser gate drive circuit, the base oftransistors 203 and 205 are connected to the low regulated B-lsupplythrough a resistor whereas in the main inverter circuit these bases areconnected to the low regulated B-lsupply by means of an auxiliarytransistor switch located in the main gate inhibit circuit 286 and willbe described in more detail hereafter. Each of the emitters oftransistors 203 and 205 are connected via a diode 209 to the emitters oftransistors 298 and 201. The emitters of these last-mentionedtransistors are then connected to ground via a diode 211.

In operation, a 400 cycle signal is applied to the primary oftransformer 288 and produces an alternating signal across the secondary.Hence, each of the diode pairs which is forwardly biased is alternatelymade noncOnductive so that the base of transistors 298 and 201 mayalternately drop to ground potential thereby shutting them OFF.Consequently, transistors 203 and 205 are made conductive alternativelyto drive the output transformer 207 and supply gating pulses to the-gates of SCRs 1 and 2 from its secondary.

Conduction angle control As previously mentioned, voltage, short circuitconstant current, and outback control of either the main or teaserinverter is obtained through the conduction angle cOntrol circuitrygenerally indicated at 232 in FIGURE 2. Both the main and the teaserinverters are provided with such a control circuit. In addition, asynchronization pulse together with a stability control circuit areapplied to this circuit. The output of the conduction angle circuit isapplied to the control gate of the third SCR through transformer 213.The basic control is provided by a unijunction transistor 215 whichconducts when its input exceeds a predetermined value. The input ofunijunction 215 is connected to ground through a capacitor 217 and thecollector of a transistor 219 which has its emitter connected to groundand its base connected to a synchronization circuit. The input ofunijunction 215 is further connected to the output of a constant currentsensing circuit 221, to the cutback line from power gate inhibit circuit236 and to the output of the load voltage sensor circuit 237 for voltageregulations. The unijunction transistor has a stable triggering voltagewhich, when exceeded at the emitter input 223, will cause an outputpulse to be applied to the base of transistor 225 and providedtransistor 227 is conducting, permit a pulse to be applied across theprimary of transformer 213. To accomplish this, a collector oftransistor 225 is connected to the primary of transformer 213 and itsemitter is connected to the collector of transistor 227 which has itsemitter returned to ground. The other base of the unijunction 215 isreturned to a very stable B-lsupply through resistor 229. This stable B+supply may be derived through standard techniques from the unregulated30 volt supply.

The load voltage from circuit 237 is a D.C. voltage derived byrectifying the output voltage from the inverter, filtering it andapplying a portion of the D.C. potential to the base of transistor 231which has its emitter connected to the input of unijunction 215 and itscollector connected to the regulated B-lthrough resistor 233.

In operation, the conduction angle control operates by charging thecapacitor 217. When the voltage across the capacitor reaches thetriggering voltage for the unijunction transistor, a pulse will beapplied to the SCRS gate which then causes the third SCR to conduct andconsequently shut off any conducting lpower SCRs. By varying the voltageacross the capacitor 217, control may be exercised over the time whenthe third SCR is fired. As shown in FIGURE 5, waveforms 508 and 510 showthe voltage across the capacitor 217. Waveform 510 is intended tocoincide with the timing of the waveforms 500, 502 and 506. The-waveform 508 shows the voltage across the capacitor with low load andthus a large control signal from the voltage control network throughresistor 231.

As can be seen, the synchronization pulse occurring at times T1, T4 andT7 reset the waveforms across the capacitor to ground level by shortingthe input to ground through transistor 219. In the absence of a controlsignal, the waveform across the capacitor looks like waveform 1508 andwhen the inverter is running at regular load, it has the appearance ofwaveform 510. Hence, when the capacitor reaches the triggering voltagefor unijunction 215 at time T2, the third SCR is fired and SCRl isextinguished. A short time later when a capacitor again commences tocharge up due to the voltage produced by transistor 231, thesynchronization pulse occurs and resets the voltage across the capacitor217.

Inverter stability control regulating the firing time of the powerrectiers As can be seen from the waveform 508, there are several timesduring each half cycle at which a gating pulse can be applied to thethird SCR from the unijunction transistor, i.e., time T2 and at time T3.The iirst pulse occurring at T2 is the desirable one for tiring thethird SCR and the second one occurring at T3 is the undesirable. Thepulse occurring at time T3 may or may not cause circuit diiicultydepending upon whether 0r not the anode of the third SCR is positivewith respect to its cathode. If it is positive, it will cause the thirdSCR to tire more than once every other half cycle causing outputinstability and sometimes misiiring of the inverter because the thirdSCR has a relatively long anode charge-up time resulting in insucientanode voltage for tiring of the third SCR at time T5. This will, ofcourse, result in unsymmetrical operation of the three SCR invertercircuit saturate the transformers and tend to produce short circuits inthe inverters with catastrophic failures. To avoid this, a logicconnection is made to avoid the second firing of the third SCR byenabling transistor 227 only when one of the power SCRs 1 or 2 isconducting. The enabling of transistor 227 allows a triggering pulse tobe applied to the third SCR gate which then shuts off the conducting`power SCR and this removes the voltage across the resistor 212. Byconnecting the base of transistor 227 to the resistor 212 this enablingfeature is simply provided for.

Under-voltage circuit The undervoltage circuit as shown in FIG. 6removes the :gate signals to the power SCRs 1 and 2 of the main andteaser inverters upon sensing of a low D.C. power voltage lead. Theoutput of the circuit removes the gates to the power SCRs but not thecontrol SCR3. The third SCR will lire to shut ofi the power SCRs sincethe storage in the output filter of the inverter will be suiicientlyhigh.

low voltage reference point is supplied by the Zener diode 602 and holdsthe emitter of transistor 600 at a potential which is less than thevoltage developed at the base of transistor 600 connected across thevoltage divider network formed by resistors 604 and 606 connected acrossthe high voltage D.C. supply and ground. Consequently, under normalconditions the transistor 600 is nonconducting yand the transistor 608is forwardly biased since its emitter is connected to the voltagedeveloped across Zener diode 602 through series connected resistors 612and 614. Both the base of transistor 608 and the collector of transistor600 forms a common junction with resistor 616, the other side of whichis connected to ground. The forward biasing of transistor 608 providescurrent to transistor 268 in FIGURE 2. Consequently, the nonconductionof transistor 608 operates to provide a large 30 volt signal to bedeveloped across the collector of transistor 268` which is thensulicient to inhibit the gate signals to the main and teaser powerinverters.

If the high voltage B supply decreases, the base of transistor 600 dropsuntil a point is reached where transistor 600 begins to conduct. As soonas transistor 600 conducts, transistor 608 draws less current which inturn tends to forward bias the emitter-to-base voltage of transistor600. Hence, transistor 608 is rapidly cut off resulting in the cutoff oftransistor 268 in FIGURE 2 thereby removing the gate drive from the mainand teaser power SCRs. Upon a raising of the high voltage D.C. supply,the opposite action will occur in a trigger fashion reapplying the gatesto the power SCRs.

Short circuit sensor The purpose of this circuit is to recognize theoccurrence of a short circuit in any of the output phases. The ycircuitproduces a positive going signal when the inverter output voltagesuddenly drops to a value below a predetermined amount. The circuit isspecically designed to speed up the response of the fourth SCR circuitto protect the main and teaser inverter power circuits.

In FIGURE 9 a transformer 900 has its primary connected in parallel withone of the phases to the output load and its secondary connected acrosstwo pairs of series back-to-back connected diodes 902, 904, 906 and 908.Each of the diode pairs have their anodes connected together and throughresistor 910 and 912 connected to the low regulated B-lsupply. Each ofthe other cathodes of the diode pairs are joined to -be `connected fromthe base by transistor 914 through a resistor divider network comprisingresistors 916 and 918. The base of transistor 914 is connected tocapacitor 920 to ground as well as through resistor 918 to ground. Theemitter of the transistor is returned to ground through a diode 922 andits collector is connected to the low regulated B-jsupply throughresistor 924 and to the output via capacitor 926, diode 928 and resistor930. The anode of the diode 928 is connected with one end of thecapacitor 926 through a resistor 932 to ground, and similarly the-output is capacitively coupled to ground via capacitor 934.

It is to be understood that for each of the phases a similar circuit isemployed and the outputs of each is connected in parallel to form asingle output applied to diode 258 of FIG. 2.

When the inverter is operating normally, 120 volts is seen on theprimary of transformer 900. The secondary of transformer 900 has 60volts on each side of the center tap. The polarity at the ends of thesecondary winding alternate between plus and minus 60 volts each halfcycle. Therefore, when the top of the secondary winding is positive,diode 902 is reverse biased and diode 904 is forward biased, creating afirst current path from the 30 volt source to capacitor 920 by way ofresistor 910, diode 904 and resistor 916. During this same timeinterval, the bottom of the secondary winding has a negative polarity,forward biasing diode 906 and reverse biasing diode 908. A secondcurr-ent path is established from the 30 volt source to the bottom ofthe seconda1y winding by way of resistor 912 and diode 906. Inparticular note that although two current paths are created from the 30volt source, there is sufficient current in 10 the first path to char-gecapacitor 920 to approximately 2 volts.

On the alternate half cycle, the upper end of the secondary windingbecomes negative and the bottom end becomes positive. In this condition,diode 906 is reverse biased and diode 908 is forward biased, furnishinga path to capacitor 920 through resistor 912, diode 908 and resistor916. A path is also established from the 30 volt source to the top ofthe secondary winding by way of resistor 910 and diode 902. It can beseen that by this technique, every half cycle of the output voltagefurnishes a charge on capacitor 920'. With capacitor 920 charged,transistor 914 is held at saturation.

When the output voltage of the inverter is shorted, diodes 904 and 908are reverse biased and diodes 902 and 906 are forward biased.Consequently, the voltage across capacitor 920 decays to ground throughresistor 918. The collapse of the voltage across capacitor 920 turnstransistor 914 off, and a positive pulse created by the rise of thecollector voltage of the transistor is coupled to the output. The outputpulse can then be used to tire the courth SCR circuitry 234 aspreviously discussed in relation to FIGURE 2. Of importance in theproper operation of the circuit during a short circuit is the fact thatthe junction point of diodes 902, 904 and resistor 910, and the junctionpoint of diodes 906, 908 and resistor 912 are placed at a potential justabove ground because of the forward biasing of diodes 902 and 906.Therefore, the anodes of diodes 904 and 908 are held at a lowerpotential than their cathodes, reverse biasing these diodes when theprimary of transformer 900 becomes shorted. During this same timeinterval, the positive potential on the base of transistor 914 holds thecathodes of diodes 904 and 908 positive with respect to their anodes,thereby insuring the reverse biasing of diodes 904, 908.

Fourth SCR extnguishment FIGURE 7, in a simplified form, shows thefourth SCR circuit in combination with the choke 230, the capacitor 238,the resistor 700 connected across the capacitor 238 and schematicallyrepresenting the series combination of resistor 240 and 242. The purposeof this circuit is to assure the extinguishment of the fourth SCR aswill -be explained in connection with its operation.

The SCRs 1 and/ or 2 may fail to properly commutate and thereby draw anexcessive high current through the resistor 212 in FIGURE 2. The highcurrent through the resistor 212 produces a misre signal which causesthe fourth SCR gate to be activated and turn ON the fourth SCR aspreviously described. When the fourth SCR is gated ON, SCRl, SCRZ andSCRS are turned OFF for a short period of time because the center tap oftransformer 200 is brought to ground level. While the center tap oftransformer 200 is grounded for the short time period, a signalindicative of the turning ON of the fourth SCR and applied to the baseof transistor 266 is used to remove the gate signals to the power SCRs 1and 2. Thereafter when the center tap of transformer 200 becomespositive again, the SCRs 1 and 2 will not be able to conduct in theabsence of a gate signal. The voltage across the capacitor 238 will bepermitted to decay at some predetermined rate and when it has decayedsufficiently the SCRl and SCRZ gates will be permitted to return toproduce power from the inverter circuitry.

If for some reason the fourth SCR does not turn OFF, the capacitor 238will remain charged and the gates to the power SCRs 1 and 2 are notpermitted to be activated. This is undesirable and can only be correctedby an additional turn OFF circuit described in relation to FIGURE 7. Thecircuit comprises a relay 702 which operates a switch 704 that isdirectly connected across the fourth SCR anode and cathode. Normally, inthe absence of current through the relay coil 702, the switch 704 isopen. In series with the coil 702 and connected to ground is the llcapacitor 708. A diode 706 is connected in parallel with the coil 702and having its anode connected to the capacitor 708. l

When the fourth SCR lires, current goesthrough the relay coil 702 whichcauses its contacts to close. The time that it takes to close is both afunction of the electrical and mechanical time constant but can becontrolled so that it remains closed after the current in capacitor 238has been reduced to a negligible value. At the time that the switch 704-closes, it will take all the current through its contacts that mightotherwise be passing through the fourth SCR. The fourth SCR willtherefore shut off and stay off since it will have no gate signal andits holding current will drop below that needed to maintain it incondition. The relay coil 702 thereupon will have suicient voltageacross it to keep it actuated until capacitor 708 charges sufficientlyto drop voltage across the relay coil to cause it to open. When therelay opens the voltage across the switch 704, the voltage across thecontacts and the current through it will be at a minimum. The time therelay is closed is determined by the relay design and the value of thecapacitor 708. Repetition of this sequence is assured by discharging thecapacitor 788 through the diode 706 and resistor 700.

Short-type identifier This circuit as shown in FIGURE 8 is intended toidentify the particular phase having a short in order to preventmisfring of the power SCR inverter. Such misfiring has been found tooccur at low loads and with f shorts across particular phases of theoutput windings. With particular reference to FIGURE 3, the schematicrepresentation of a well-known, two-phase to three-phase Scott-Tconversion is shown. Thus, the output from the main inverter phase isapplied across one transformer having a secondary with terminals E andC. The teaser inverter output is applied across a transformer having asecondary winding connected across A and O where O represents the centertap of winding E-C.

The circuit is specifically designed to hold off the voltage applied tothe main inverter circuit when a short is applied between either theterminal A and C or A and E. On the other hand, the main invertervoltage should not be held off when a short is applied to the terminalsC and E or across A, C and E simultaneously.

As shown in FIGURE 8, the phase voltages A-E and A-C are applied to twotransformers 800 and 802 and each of the secondaries of these twotransformers is applied to a full wave rectifier circuit 804 and 806.The output of the diode network 804.is filtered through a D.C. voltageacross the capacitor 808 with the polarity as indicated. Similarly, theoutput of the diode bridge 806 produces a D.C. voltage across thecapacitor 810 along the polarities as indicated. The positive sides ofcapacitors 808 and 810 are connected together so that the voltagemeasured across the negative sides of the capacitors 808 and 810produces a difference signal corresponding to the difference in thevoltage between the phases A-E and A-C. The resistor 812 interconnectsthe negative side of capacitor 808 with the negative side of the diodebridge network 804, and the positive side of capacitor 808 is connectedto the positive output of this diode bridge. The resistor 814 isconnected in parallel with capacitor 808. In a similar manner but withreversed polarities, the resistors 816 and 818 are connected to thediode bridge network 806 and capacitor 810. The output across thenegative terminals of the capacitors 808 and 810 produces a signalindicative of the difference between phases A-E and A-C and is appliedthrough diode 820 through a resistor 822 to the base of transistor 824.It is also applied to the center point of a series resistor combinationcomprising resistors 826 and 828, one end of which is connected toground and the other through a resistor 830 to the low regulatedB-lsupply. The voltage developed across the series combination ofresistors 826, 830 and 828 is applied to the base of transistor 832 withthe base also being connected to ground through a capacitor 834.Essentially in parallel with the transistor 832 and used for amplifyingthe signals applied to the base transistor 832 is the circuitry involvedwith transistor 836. The latter transistor has its base directlyconnected to emitter of transistor 832 and its emitter connected toground through a diode combination 838. The collectors of transistors832 a'nd 836 are connected together and through a resistor 840 connectedto the collector of transistor 842 and the base of transistor 844. Thebase of transistor 842 in turn derives its input signal from thecollector circuit of transistor 824 by connecting it to the midpoint ofthe series combination of resistors 846 and 848. Resistor 846 is con-lnected to the collector of`transistor 824 and resistor 848 is connectedto the 30 volt supply. The emitter of transistor 842 is connected to the30 volt supply through resistor 850 and via a resistor 852 is connectedto the emitter of transistor 844. The output from the collector oftransistor 844 is applied to the main inverter gatesdrive circuitry 228.

Three separate modes of operation of this circuit are possible and theseare as follows. When there is a short across the A-C phase, this causesall the inverter gates to be shut otf in a manner described inconnection with the short circuit sensor and the fourth SCR circuit ofFIGURE 2. Since the firing of the fourth SCR circuit produces a largepositive voltage rise at the collector of transistor 268 and this signalis applied through the series combination of resistor 856 and diode 858to the base of transistor 824, and since the capacitor 862 is charged bythis signal, the transistor 824 will remain forwardedly biased evenafter the voltage from the collector of transistor 268 that shut off thegates to the power inverters has disappeared. Forwardly biasingtransistor 824 will hold transistor 842 forwardly biasedand maintaintransistor 844 cut off. As long as transistor 844 is off, the maininverter will remain turned off and only the teaser inverter will bepermitted to turn on. If no other signal was present, the main inverterwould turn on a short time later after the voltage across the capacitor862 has been discharged.

However, a short was applied to the phase A-C so that when the teaserinverter begins to come up in voltage, there will be no voltagedeveloped across the transformer 880 although there will be a voltagedeveloped across thetransformer802. As a result, a positive voltage isgenerated at the input to diode 820 which is sufficient to keeptransistor 824 conducting and hold transistor 844 cut olf as long as theshort across the winding A-C exists. The main inverter output,therefore, will not turn on as long. as the short exists. l

. In the event a short occurs across the winding A-E, the initialsteps'described in relation to the short occurring across winding A-Care repeated.

. However, when the teaser winding comes up in voltage with A-E shorted,there will be no voltage across the secondary of transformer 802l butthere will be a voltage across the transformer 800 so-that a negativevoltage will be applied at the input to diode 820. This negative voltagewill permit transistor 824.to become cut off. However, the negativevoltage is also applied in effect to the base of transistor 832 which isthereby cut off and in turn will remove the base drive from thetransistor ,844 by also cutting off transistor 836. This conduction willremain until the shortv across the winding A-E has been removed.

When a1 short across-winding C-E or all three phases occurs, the initialsteps described in relation with the short across A-C are repeated.

However, when the teaser winding voltage comes up, the voltagesdeveloped across the secondary of the transformer 888 or y882 are equaland the voltage difference sensed at the input to diode 82() is so smallthat it is insuflicientto turn ON either transistor 824 or turn OFFtransistor 832. Consequently, after the voltage across the capacitors860 and 862 has decayed sufficiently, transistor 824 will be permittedto turn OFF, transistor 842 will be turned OFF, and both transistor 832and 836 will be biased ON to permit transistor 844 to apply full powerto the main gates thereby allowing the circuit to resume normaloperation.

It thus may be seen that a short across one particular phase of amultiphase circuit can be detected to thereafter protect-the powerinverters from misring and catastrophic failures.

Overvoltage circuit This circuit is intended to solve the problem whenhigh input power and high input voltage changes cause the breaking downof the input rectifier diodes and change the voltage sharing across thepower SCRs in the inverter circuits. FIGURE shows a circuit which isintended to provide this overvoltage protection. Each of the input linesfrom the three-phase input power is passed through a circuit breaker andall of these three circuit breakers may be tripped -by another circuitbreaker trip coil 1002. In series with the trip coil is an SCR 1032whose gate is connected to the secondary of the transformer 1004. Theprimary of the transformer 1004 derives its input from one of the basesof a unijunction transistor 1006 and the other terminal of the primaryis returned to ground. The other base of unijunction 1006 is returnedthrough a resistor 1008 to the regulated low voltage B+ supply. Theinput to the overvoltage sensing circuit is derived by monitoringthrough a series resistor network connected across the high voltage D.C.supply for powering the main and teaser inverters. The series resistorcombination comprises resistors 1010, 1012 and 1014. Resistor 1012 is apotentiometer with its arm connected to the base of transistor 1018. Theemitter of transistor 1018 is connected to ground through resistor 1020and the collector of this transistor is returned to a regulated Voltagederived from the 30 volt supply through resistor 1022. The collector oftransistor 1018 is connected to the base of transistor 1024 which hasits emitter connected through a diode 1026 to the emitter of transistor1018. The collector of transistor 1024 is returned through a resistor1028 to the regulated supply. A capacitor 1030 is connected from thecollector of transistor 1024 to ground.

The input voltage is sensed by the wiper arm of potentiometer 1012 andwhen it exceeds the triggering voltage of the Schmidt trigger circuitformed by the transis* tors 1018 and 1024, the state of transistor 1024switches from ON to OFF so that capacitor 1030 may then charge from thesupply through resistor 1028. The time constant of the resistor 1028 andcapacitor 1030 combination is so set that it would fire unijunctiontransistor 1006 many times compared to the basic input frequency. Whencapacitor 1030 charges to the triggering voltage of the unijunctiontransistor, the latter fires and in turn applies a gating signal to theSCR 1032. Once SCR 1032 fires, the current is permitted to ow throughthe circuit breaker trip coil 1002 which then in turn causes all of theother circuit breakers through which the threephase input power isapplied to trip and break away. The advantage of this circuit is thatthe circuit breakers are tripped at a preset voltage independent of thecurrent fiowing through the circuit breaker coils 1003, 1005, and 1007.The current level which trips the trip coil 1002 does not grow slowlybut appears as a step function; on the other hand, the circuit will notreact to a low power transient since the unregulated voltage sensed bythe potentiometer 1012 is derived from the high voltage D.C. supplywhich is connected in turn to a large capacitor bank of filters that isuncapable of following rapid input voltage fluctuations.

Constant current control circuit As described in relation to FIGURE 2, aconstant current control is applied to the conduction angle controlcircuit 232 at the unijunction input 223. Each of the main and teaserconduction angle control circuits is supplied with such a constantcurrent input. The `purpose of this circuit is to provide the systemwith a constant output current during short conditions so that theequipment responsible for the short-circuit condition may be forced offthe line by blowing its input fuse or trip its input circuit breaker.

The constant current circuit senses the current flow through each of thethree wires leading from the output transformer. Hence, with referenceto FIGURE 11, the output phase voltages are developed across theterminals A, E and C where the current sensed by current transformer1100 is the teaser current, and the combination of the currenttransformers 1102 and 1104 indicate the total main current. Both of the`main current transformers outputs are rectified and filtered and placedin parallel combination so that the largest of the two signals willdominate the subsequent circ-uitry. This circuitry includes across therectified output a resistor 1104 in series with a Zener diode 1106 toprovide a reference voltage for an emitter of transistor 1108. Theemitter of this transistor is connected to be biased by the Zener diodereference voltage and the base of transistor 1108 is c0nnected to thewiper arm of potentiometer 1114 connected across the D.C. output fromthe rectiers 1110 and 1112. The collector of transistor 1108 isconnected to the low regulated B+ supply. The output from the mainconstant current detector is obtained from the emitter of transistor1108 and is directly connected to the input of unijunction 215 as shownin FIGURE 2. In a similar manner, the constant current output signal isderived for the teaser winding and teaser conduction angle controlcircuit.

In operation when a short circuit is detected in either one `of the mainwindings, the voltage across the main winding will essentially drop tozero and the current supplied by the voltage control circuitry shown inFIGURE 2 is effectively deactivated by the absence of a signal to itsinput. An output, however, has been now generated from one of therectifier and filter networks, for example, 1110. With the polarity, asindicated, a reference voltage will be developed across the Zener diode1106. The potentiometer 1114, however, as connected to the base of thetransistor 1108 controls a value of the voltage at which the transistor1108 commences to conduct and this voltage is proportional to thecurrent flowing through either current sensor 1102 or 1104. The largestof the two voltages produced by rectifier 1110 and 1112 will govern theconduction of transistor 1108 and in this manner these voltages areconnected in a most-gate fashion. In a sirnilar manner to that describedin relation to the main currents occurring in the teaser winding issensed by current sensor 1100 rectified and filtered to produce a D.C.voltage which then develops a current source to be applied to theconduction angle control for the teaser inverter.

The system operation of the complete inverter as heretofore described,can best be understood in relation to a voltage current digram shown inFIGURE 4. As the input power is applied to the system, the outputvoltage will rise relatively slowly -along the portion 400 since thecontrol circuitry that commences with firing of the fourth SCR forcesthe shut ofi of all of the power inverters and removes the signals tothe gates of the SCRs until the Ahigh and low voltage D.C. supplies havehad an opportunity to rise to their design levels 402. When this levelis reached and after the delay action produced by capacitor 276 andresistor 278 as shown in FIGURE 2 to cut back the conduction angle inboth the teaser and the main inverters, the output voltage commences torise along figure 400 up to the regulated level as shown by the 402 partof the curve. The reference value of this voltage is determined by thesetting of the potentiometer 235 shown in FIGURE 2. As the load isincreased and additional currents are demanded, the voltage remainsconstant but the current builds up. When the short circuit occurs in asudden fashion, its affect upon the system is a complete cutbaclc of theoutput power as shown by the curved portion 404. Since the system isdesigned to produce a constant current output, the constant currentcontrol facting upon the conduction angle control circuitry as typicallyshown in FIGURE 2 with circuitry 232, takes over control because theoutput voltage is so low that no useful control signal can be derivedfrom the potentiometer 23S. The constant current control circuitrythereupon increases the output current and a small amount in the outputvoltage along the curve 406 to the level determined `by thepotentiometer and the constant current control circuit. This constantcurrent will be supplied regardless of the drop in the output voltage aslmight happen as shown along the portion of the curve 408. If the shortcircuit is suddenly removed, the initial reaction of the system will beevidenced by a drop in the current supply that is shown by the portionof the curve 410. As the current drops the voltage control network againcom'- mences to take over control and drives the output voltage to thepredetermined control level along the curve 412.

If, on the other hand, the short circuit is a gradual phenomena so thatthe constant current control takes over from the voltage control in agradual manner, then the transition from constant voltage to constantcurrent will occur without the outback and subsequent =rise of curves404 Iand 406 but directly enter the constant current mode of curve 408.

It is to be understood that the invention is not limited to the specificembodiments herein illustrated an-d described, but may be used in otherways without departure from its spirit as defined by the followingclaims.

Wo claim:

1. A control circuit for an inverter fed by D.C. power and having a pairof push-pull pulse-width modulated operated power controlled rectilierscoupled to a common A.C. output comprising:

a control rectifier commutatively coupled to the power controlledrectiers to extinguish the power controlled rectifiers upon the firingof the control rectifier,

means for generating a D.C. voltage signal indicative of the desiredA.C. output voltage of the inverter by comparing a first D.C. referencesignal with a first D.C. signal derived from the A.C. output to producea first error signal,

means for sensing the A.C. current in the inverter output and producinga D.C. current signal indicative thereof, said means for sensing A.C.current further including,

means establishing a second D.C. reference signal indicative of adesired short-circuit current in said A.C. inverter output circuit,

means responsive to the A.C. current in said inverter output forproducing a second D.C. signal proportional thereto,

means comparing said second reference signal and said second D.C,proportional current signal and producing a second error signalproportional to the excess of the inverter output current over saiddesired short-circuit current,

control means responsive to the first error signal and 16 l the seconderror signal -for generating a trigger signal and applying the triggersignal to fire the control rectifier to control the conduction times ofthe power controlled rectifiers.

Z. A device as recited in claim 1 wherein said voltage signal generatingmeans comprises:

means establishing a first D.C. reference signal indicative of thedesired A.C. output voltage,

means responsive to the A.C. output voltage for producing a rst D.C.signal proportional thereto, and means comparing said first referencesignal and said first D.C. signal for producing a first error signalproportional to the difference therebetween.

3. A device as recited in claim 2 and further comprising:

means for sensing the occurrence of a malfunction in the inverter andgenerating a signal indicative thereof,

means applying said malfunction signal to said control means to cut backthe conduction time of said power controlled rectifier to apredetermined minimum duration.

4. A device as recited in claim 3 wherein said malfunction sensing meanscomprises:

means for generating a short signal indicative of the occurrence of ashort in said A.C. output.

5. A control circuit for the protection of an inverter fed by D.C. powerand having a pair of push-pull pulsewidth modulated power controlledrectiiiers for the generation of A.C. output power comprising:

means for sensing a malfunction in said inverter and producing a signalindicative thereof, said means -for sensing a malfunction furtherincluding,

a short-circuit sensor producing a signal indicative of a short in theA.C. output power,

said misfire sensor further including,

-a resistor in series connection with each of Ithe power controlledrectifiers, and

switching means responsive to the voltage developed across said resistorto produce said misre signal when said resistor voltage exceeds apredetermined minimum,

a misre sensor producing a signal indicative of the occurrence of amisring of the power controlled rectifiers generating the A.C. outputpower,

means for controlling the conduction times of said power controlledrectifiers and responsive to said malfunction signal to cut back theconduction times of the power controlled rectifiers to a predeterminedminimum duration.

References Cited UNITED STATES PATENTS 3,075,136 1/1963 Jones 321--453,252,073 5/1966 Maine 321-14- X 3,315,146 4/1967 Paice 321--453,355,653 11/1967 Paradissis 321--2 JOHN F. COUCH, Primary Examiner.

WARREN E. RAY, Examiner.

W. H. BEHA, Assistant Examiner.

UNITED STATES PATENT oFFlcE CERTIFICATE OF CORRECTION Patent No. 3 ,392,321 July 9, 1968 Ronald Giannamore et al.

It is certified that error appears in the above identified patent andthat said Letters Patent are hereby corrected as shown below:

Column 16 line 3S beginning with "output power," cancel all to andincluding "power," in line 46, same column 16, and insert output powercircuit, a misfire sensor producing a signal indicative of theoccurrence of a misfirng of the power controlled rectifiers generatingthe A.C. output power, said misfire sensor further including, a resistorin series connection with each of the power controlled rectifiers, andswitching means responsive to the Voltage developed across said resistorto produce said Insfire signal when said resistor voltage exceeds apredetermined minimum,

Signed and sealed this 9th day of December 1969.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. WILLIAM E. SCHUYLER, JR. Attesting OfficerCommissioner of Patents

